Jetway-computer NF77 Manuel d'utilisateur télécharger pdf (Page 28)

3-6-1 DRAM Timing Settings

Phoenix – AwardBIOS CMOS Setup Utility

DRAM Timing Settings

I tem Help

Auto Configuration By SPD

* DRAM CAS Latency (TCL) SPD

* RAS Active Time (Tras) 17T

* ROW Precharge Time (Trp) 5T

*RAS to CAS Delay (Trcd) 5T

DRAM Bank Interleaving Enabled

DDR Burst Length SPD

DRAM Command Rate 2T

DDR Y Table Optimize

ODT Disabled

Menu Level >>

↑↓→←

Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help

F5:Previous Values F6:Optimized Defaults F7:Standard Defaults

Auto Configuration

The default setting is By SPD. User can set it as Manual to enable 4 sub items below it:

*DRAM CAS Latency (TCL)

The optional settings are 2T, 3T, 4T, 5T, 6T and SPD.

*RAS Active Time (Tras)

The optional settings are from 5T to 20T.

*Row Precharge Time(Trp)

The optional settings are 2T, 3T, 4T, 5T and 6T.

*RAS to CAS Delay(Trcd)

The optional settings are 2T, 3T, 4T, 5T and 6T.

DRAM Bank Interleaving

User can activate DRAM Bank Interleaving by set the item as Enabled. The optional settings

are: Enabled; Disabled.

DDR Burst Length

User can set it as 4,8 or SPD. The optional setting is SPD.

DRAM Command Rate

1 2 ... 23 24 25 26 27 28 29 30 31 32 33 ... 39 40

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Jetway-computer NF77 Manuel d'utilisateur Page 28